If GrapheneOS stops supporting future Pixels, and Motorola is only targeting the flagship market for their compatible phones, we’re looking at truly dark days ahead.

  • grue@lemmy.world
    link
    fedilink
    arrow-up
    2
    ·
    16 hours ago

    That means using existing designs with a die shrink or something is often the right choice when you’re shooting for the low cost portion of the market. The technology referenced here, enhanced memory tagging extensions, is a hardware implementation of tagging that requires a specific revision of the arm design and it’s a relatively new change (mte, the precursor to emte, is flawed and not used).

    I’m writing this on a Pixel 8 running GrapheneOS, which I’m pretty sure is a “recommended” device that supports all the security features and is also multiple generations old.

    If new lower-end devices use die-shrink versions of previously flagship SoCs, as you say, then I simply do not buy the notion that there’s any good reason not to put a die-shrink version of this SoC in a new lower-end phone.

    • TrollAccount69@lemmy.ml
      link
      fedilink
      arrow-up
      1
      ·
      15 hours ago

      I don’t have the datasheet in front of me but I’m almost 100% sure your tensor doesn’t have emte, which is the type of mte the graphene people are requiring for new devices.

      • grue@lemmy.world
        link
        fedilink
        arrow-up
        3
        ·
        14 hours ago

        From https://grapheneos.org/faq#recommended-devices :

        8th generation and later Pixels also have support for the incredibly powerful hardware memory tagging security feature as part of moving to new ARMv9 CPU cores. GrapheneOS uses hardware memory tagging by default to protect the base OS and known compatible user installed apps against exploitation, with the option to use it for all apps and opt-out on a case-by-case basis for the few incompatible with it. Pointer authentication, branch target identification and other ARM security features were also introduced at the same time as hardware memory tagging.